1. Technical Field
Embodiments of the present disclosure relate to a refresh control device, and more particularly to a technology for efficiently storing weak cell refresh addresses.
2. Related Art
In recent times, consumer demand for high-capacity dynamic random access memories (DRAMs) for use in mobile electronic appliances including smartphones, or the like, is rapidly increasing. Generally, data stored in memory cells of a semiconductor memory device such as DRAM may be changed by a leakage current. Therefore, a refresh operation is needed for periodically recharging data stored in the memory cells.
A memory cell of a dynamic semiconductor memory, such as DRAM, stores data in a capacitive element. Due to leakage of charges from the capacitive element, the memory cell must be periodically refreshed. The refresh process performs a read operation for restoring a level of charges stored in the memory cell to an original state.
Specifically, a semiconductor memory device such as a Double Data Rate Synchronous DRAM (DDR SDRAM) includes a plurality of memory banks storing data therein, and each memory bank includes tens of millions of memory cells therein. Each memory cell includes a cell capacitor and a cell transistor. The semiconductor memory device may charge or discharge the cell capacitor to store data therein.
The charge stored in the cell capacitor must be ideally constant if an additional control signal is not used. However, the charge stored in the cell capacitor may be unavoidably changed due to a difference in voltage between the cell capacitor and the peripheral circuit.
In other words, charges may leak outside the cell capacitor if the cell capacitor is charged with electricity, or charges may be received when the cell capacitor is discharged. Changing the amount of charge stored in the cell capacitor may indicate that data stored in the cell capacitor has changed, resulting in loss of the stored data. The semiconductor memory device may perform a refresh operation to prevent the stored data from being lost.
Different types of refresh methods have been developed over time. Generally, the auto refresh method uses a refresh timer located outside of a memory chip, such that the memory chip can perform the refresh operation in response to a periodic refresh command from a controller.
The self refresh method is configured to use a refresh timer located inside the memory chip, such that all the memory chips are configured to request a refresh start command from the controller.